| PART |
Description |
Maker |
| HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear
Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| AAT3562IGY-320-T1 AAT3562IGY-420-T1 AAT3564IGY-420 |
Triple 3-input positive-AND gates 14-PDIP 0 to 70
CONNECTOR ACCESSORY
Triple 3-input positive-AND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-PDIP 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SO 0 to 70
Triple 3-input positive-AND gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70
Dual J-K Flip-Flops With Clear 14-SO 0 to 70
NanoPower Voltage Detector NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-SOIC 0 to 70 NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-PDIP 0 to 70 NanoPower电压检测器
|
Advanced Analogic Technologies, Inc.
|
| KS74AHCT78 |
Dual J-K Flip-Flops
|
Samsung
|
| HD74HC107 HD74HC107P HD74HC107RPEL HD74HC107FPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| 74VHC112MTC |
Dual J-K Flip-Flops with Preset and Clear
|
ON Semiconductor
|
| UT54ACTS74E |
Dual D Flip-Flops with Clear and Preset
|
Aeroflex Circuit Techno...
|
| KS74AHCT109 |
Dual J-K Positive Edge-Triggered Flip-Flops
|
Samsung
|
| HD74LVC74 |
Dual D-type Flip Flops with Preset and Clear
|
Hitachi Semiconductor
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| DM74AS874 DM74AS874WM DM74AS874NT DM74AS874WMX |
Dual 4-Bit D-Type Edge-Triggered Flip-Flops
|
FAIRCHILD[Fairchild Semiconductor]
|
| UT54ACS74 UT54ACTS74 |
Radiation-Hardened Dual D Flip-Flops with Clear & Preset
|
ETC
|
